Quantum Error Correction

Quantum error correcting codes can enable large quantum computations provided physical error rates are sufficiently low. We combine post-selection with surface code error correction through the use of exclusive decoders, which abort on decoding instances that are deemed too difficult. For the most discriminating of exclusive decoders, we demonstrate a threshold of 50% under depolarizing noise (or 32(1)% for the fault-tolerant case), and up to a quadratic improvement in logical failure rates below threshold. Furthermore, with a modest exclusion criterion, we identify a regime at low error rates where the exclusion rate decays with code distance, providing a pathway for scalable and time-efficient quantum computing with post-selection. Our exclusive decoder applied to magic state distillation yields a 75% reduction in the number of physical qubits, and a 60% reduction in the total spacetime volume, including accounting for repetitions. Other applications include error mitigation, and in concatenated schemes.

The monumental task of building a fault-tolerant quantum computer with several millions qubits has motivated research into ‘hardware efficient’ architectures, which allow for the implementation of error correction without exploding the number of physical components required. The dissipative cat qubit architecture is one of these approaches. Cat qubits belong to the family of bosonic codes, where quantum information is encoded in the infinite-dimensional Hilbert space of a quantum harmonic oscillator. Thanks to the encoding of the cat qubit, one of the two errors (bit-flip) is exponentially suppressed with the ‘size’ of the cat qubit, that is without any additional hardware cost, which has enabled recent experimental realisation of a cat qubit with macroscopic bit-flip times of several tens of seconds.

In this talk, I will present how one can combine dissipative cat qubits in high-rate phase-flip LDPC codes to obtain a logical qubit at a moderate hardware cost. Most importantly, the families of codes we construct are local in 2D, a highly desirable feature for some hardware platforms including superconducting circuits. Furthermore, I will show how a universal set of fault-tolerant logical gates can be realised on these codes, at the cost of adding a second planar layer of ancillary cat qubits on top of the memory block.

In a second part, I will review the recent experimental progress to build the basic building blocks of this architecture and discuss the current obstacles to overcome in the near future.

Quantum error correction is usually implemented via an active schedule of discrete error syndrome measurements and adaptive recovery operations which are hardware intensive and prone to introducing and propagating errors.  In this talk, we will discuss our recent series of experiments tailoring continuous dissipative processes in superconducting circuit QED to implement autonomous error correction for qubits encoded in bosonic cavity states.  We will focus on two generations of experiments realizing the Parity Recovery by Selective Photon Addition (PReSPA) operator, which stabilizes the photon number parity, hence correcting for the dominant single-photon loss errors in the 4-component cat codes.  We will also discuss our ongoing effort towards dissipative stabilization of multi-mode bosonic qubits.

Neutral atom quantum computing is a rapidly developing field. Exploring new atomic species, such as alkaline earth atoms, provides additional opportunities for cooling and trapping, measurement, qubit manipulation, high-fidelity gates and quantum error correction. In this talk, I will present recent results from our group on implementing high-fidelity gates on nuclear spins encoded in metastable 171Yb atoms. In particular, I will focus on leveraging the metastable state to convert gate errors into erasure errors, which can be detected efficiently mid-circuit. I will close by demonstrating encoding and decoding of logical qubits using erasure conversion information to improve the decoding outcome, and discussing fault-tolerant QEC architectures that are robust to undetected leakage and atom loss.

The stochastic, non-unitary nature of measurement is a cornerstone of quantum theory and stands in stark contrast with the deterministic, unitary evolution prescribed by Schrodinger’s equation. Due to these unique properties, measurement is key to fundamental protocols in quantum information science such as teleportation, error correction and measurement-based computation. All these protocols use quantum measurements, and classical processing of their outcomes, to build particular structures of quantum information in space-time. I will present some results [1] on these “monitored” circuits comprising both unitary gates and controlled projective measurements. Time permitting, I will also discuss another work [2], which experimentally realized quasiparticles with non-Abelinian exchange statistics, a key ingredient in topological quantum computing.

[1] Hoke et al., Nature 622, 481–486 (2023)

[2] Andersen et al., Nature 618, 264–269 (2023)

In order to solve problems of practical importance, quantum computers will likely need to incorporate quantum error correction, where a logical qubit is redundantly encoded in many noisy physical qubits.  Quantum error correction typically incurs large physical qubit overheads, motivating the search for more hardware-efficient approaches.  In this talk we will present and characterize a superconducting circuit which realizes a logical qubit memory formed from the concatenation of encoded bosonic cat qubits with an outer repetition code of distance d=5.  The bosonic cat qubits are passively protected against bit flips by two photon dissipation.  Cat-qubit phase-flip errors are corrected by a repetition code which uses ancilla transmons for syndrome measurement.  We will discuss the architecture we use for syndrome measurements and characterize the performance of the logical qubit memory.   The phase-flip correcting repetition code operates below threshold, with logical phase-flip error decreasing with code distance from d=3 to d=5.  Concurrently, the logical bit-flip error is suppressed with increasing cat-qubit mean photon number. The minimum measured logical error per cycle is on average 1.75(2)% for the distance-3 code sections, and 1.65(3)% for the longer distance-5 code, demonstrating the effectiveness of bit-flip error suppression throughout the error correction cycle. We will tie our results to the longer term opportunities for reaching computationally relevant error rates with concatenated bosonic qubits.

We explore a new approach for completing the universal set of logic gates in two dimensions by transforming the codestates of a few copies of the toric/surface code into a non-Abelian topological phase and subsequently reversing the operation. We propose several concrete fault-tolerant protocols that realize magic state preparation and non-Clifford unitary gates. At the circuit level, these protocols are quite simple: they involve few-qubit Pauli measurements, on-site (or three-qubit nearest-neighbor, depending on the geometry) non-Clifford unitary gates and  Pauli and Clifford corrections following from the just-in-time decoding. These results constitute a new approach to universal topological quantum computation in two dimensions without anyon braiding or magic state distillation.

Continuous-variable cat codes are encodings into a single photonic or phononic mode that offer a promising avenue for hardware-efficient fault-tolerant quantum computation. Protecting information in a cat code requires measuring the mode’s occupation modulo two, but this can be relaxed to a linear occupation-number constraint using the alternative two-mode pair-cat encoding. We construct multi-mode codes with similar linear constraints using any two integer matrices, 𝐻𝑋 and 𝐻𝑍 , satisfying the homological constraint of a quantum rotor code. Stabilizing operators are either linear combinations of occupation-number operators defined by rows of 𝐻𝑍 , or products of annihilation/creation operators whose powers form rows of 𝐻𝑋 . Just like the pair-cat code, syndrome extraction can be performed in tandem for both types of stabilizers using current superconducting-circuit designs. Our framework encompasses two-component cat, pair-cat, two-mode binomial, and aspects of chi-squared encodings while also yielding bosonic codes from homological products, lattices, and algebraic varieties. We cover several examples, including a surface-like code that is not obtained by concatenating a bosonic code with the surface code.

Device characterization is crucial in quantum computing. While there are many protocols for benchmarking devices before operating on actual algorithms, there is also a need for online benchmarking for both physical and logical errors on fault-tolerant circuits. We map general fault-tolerant Clifford circuits to spacetime codes and come up with a scheme of characterizing Pauli noise in Clifford circuit using syndrome data during active error correction. Moreover, we estimate both physical and logical fidelity in a general logical Clifford circuit and show that the logical fidelity can be efficiently estimated using the syndrome data only under the assumption of local Pauli noise. This provides a way of characterizing physical components of the device to help gate tune up, improve decoding, and verify the logical circuits with no extra cost but only efficient classical processing of the syndrome data.